1. Field of the Invention
Embodiments of the present invention relate to a semiconductor device and a semiconductor module.
2. Description of the Related Art
In conventional automotive power integrated circuits (ICs), a vertical diode is used as a protection element to protect internal circuits from voltage surges. FIG. 10 is a cross-sectional view of an example of a structure of a general vertical diode. In FIG. 10, conductivity types of a p+-type starting substrate 101 and a p−-type epitaxial layer 102 are indicated as “p+sub” and “p−epi”, respectively (similarly in FIG. 11). As depicted in FIG. 10, a vertical diode has a structure in which an n-type diffusion region 103 that constitutes an n-type cathode region is formed in a p−-type epitaxial layer 102 stacked on a front surface of the p+-type starting substrate 101 that constitutes a p+-type anode region. The vertical diode further has an n+-type diffusion region 104 that is for contact (electrical contact with a metal layer) and formed in the n-type diffusion region 103.
In the vertical diode depicted in FIG. 10, generally, a metal layer that is connected to the n+-type diffusion region 104 in a front surface (surface on the p−-type epitaxial layer 102 side) of a semiconductor substrate 110 is a cathode electrode 106, and a metal layer that is connected to the p+-type starting substrate 101 of a rear surface side (rear surface of the p+-type starting substrate 101) is an anode electrode 107. The semiconductor substrate 110 is an epitaxial substrate in which the p−-type epitaxial layer 102 is stacked on a front surface of the p+-type starting substrate 101. In the p−-type epitaxial layer 102, a p-type impurity diffuses from the p+-type starting substrate 101, which has a relatively high impurity concentration. Therefore, a p-type transition layer 105 (hatched part) is formed in a surface layer of the p−-type epitaxial layer 102, the surface layer facing the p+-type starting substrate 101. The p-type transition layer 105 has a concentration gradient in which a p-type impurity concentration is lower with increasing depth from an interface with the p+-type starting substrate 101.
On the other hand, for example, in a power IC of a chip-on-chip (CoC) type such as where an IC chip is stacked on an output stage device chip, an IC chip and a metal electrode on a front surface of the output stage device chip are electrically insulated by an insulating film attached to a rear surface of the IC chip. The entire rear surface of the IC chip is covered by the insulating film and wiring cannot be connected to the metal layer of the rear surface of the IC chip. Therefore, when the IC chip of a CoC type power IC is the vertical diode depicted in FIG. 10, the anode electrode 107 of the rear surface of the IC chip cannot be used. As a vertical diode that solves this problem, up-anode type vertical diodes have been proposed in which a p+-type diffusion region for contact with an anode electrode and a metal layer constituting the anode electrode are formed on a front surface side of a semiconductor substrate (for example, refer to Japanese Patent No. 2712448, Japanese Patent No. 4547977, Japanese Laid-Open Patent Publication No. 2009-27050).
FIG. 11 is a cross-sectional view of an example of a structure of a conventional up-anode type vertical diode. In FIG. 11, the conductivity type of the p-type transition layer 105 is indicated as “p transition layer”. FIGS. 12A and 12B are characteristic diagrams of impurity concentration gradients at cutting line AA-AA′ and cutting line BB-BB′ in FIG. 11, respectively. The conventional up-anode type vertical diode depicted in FIG. 11 differs from the vertical diode depicted in FIG. 10 in that a p+-type diffusion region (hereinafter, p+-type surface anode region) 108 is provided in the p−-type epitaxial layer 102, and an anode electrode 109 connected to the p+-type surface anode region 108 is provided on the front surface of the semiconductor substrate 110. The pn junctions of the p+-type surface anode region 108, the p−-type epitaxial layer 102 and the p-type transition layer 105 formed with the n-type diffusion region 103 and the n+-type diffusion region 104 are used as a pseudo vertical diode. Wiring is connected to the cathode electrode 106 and the anode electrode 109 on the front surface of the semiconductor substrate 110.